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Section 11 Programmable Timing Pattern Controller
Bits 5 and 4—Group 2 Compare Match Select 1 and 0 (G2CMS1, G2CMS0): These bits
select the compare match event that triggers TPC output group 2 (TP
Bit 5: G2CMS1
Bit 4: G2CMS0
0
0
1
1
0
1
Bits 3 and 2—Group 1 Compare Match Select 1 and 0 (G1CMS1, G1CMS0): These bits
select the compare match event that triggers TPC output group 1 (TP
Bit 3: G1CMS1
Bit 2: G1CMS0
0
0
1
1
0
1
Bits 1 and 0—Group 0 Compare Match Select 1 and 0 (G0CMS1, G0CMS0): These bits
select the compare match event that triggers TPC output group 0 (TP
Bit 1: G0CMS1
Bit 0: G0CMS0
0
0
1
1
0
1
Rev. 3.00 Mar 21, 2006 page 410 of 814
REJ09B0302-0300
Description
TPC output group 2 (TP
match in ITU channel 0
TPC output group 2 (TP
match in ITU channel 1
TPC output group 2 (TP
match in ITU channel 2
TPC output group 2 (TP
match in ITU channel 3
Description
TPC output group 1 (TP
match in ITU channel 0
TPC output group 1 (TP
match in ITU channel 1
TPC output group 1 (TP
match in ITU channel 2
TPC output group 1 (TP
match in ITU channel 3
Description
TPC output group 0 (TP
match in ITU channel 0
TPC output group 0 (TP
match in ITU channel 1
TPC output group 0 (TP
match in ITU channel 2
TPC output group 0 (TP
match in ITU channel 3
to TP
).
11
8
to TP
) is triggered by compare
11
8
to TP
) is triggered by compare
11
8
to TP
) is triggered by compare
11
8
to TP
) is triggered by compare
11
8
to TP
).
7
4
to TP
) is triggered by compare
7
4
to TP
) is triggered by compare
7
4
to TP
) is triggered by compare
7
4
to TP
) is triggered by compare
7
4
to TP
).
3
0
to TP
) is triggered by compare
3
0
to TP
) is triggered by compare
3
0
to TP
) is triggered by compare
3
0
to TP
) is triggered by compare
3
0
(Initial value)
(Initial value)
(Initial value)
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