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P1DDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. If a P1DDR bit is set to 1, the corresponding pin maintains its output
state in software standby mode.
Port 1 Data Register (P1DR)
P1DR is an 8-bit readable/writable register that stores port 1 output data. When this register is
read, the pin logic level of a pin is read for bits for which the P1DDR setting is 0, and the P1DR
value is read for bits for which the P1DDR setting is 1.
Bit
7
P1
7
Initial value
0
Read/Write
R/W
P1DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
6
5
4
P1
P1
P1
6
5
0
0
0
R/W
R/W
R/W
Port 1 data 7 to 0
These bits store data for port 1 pins
3
2
P1
P1
4
3
2
0
0
R/W
R/W
Rev. 3.00 Mar 21, 2006 page 251 of 814
Section 9 I/O Ports
1
0
P1
P1
1
0
0
0
R/W
R/W
REJ09B0302-0300
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