Data
Address
Register
Bus
(low)
Name
Width Bit 7
H'4C
Reserved area (access prohibited)
H'4D
H'4E
H'4F
H'50
H'51
H'52
H'53
H'54
H'55
H'56
H'57
H'58
H'59
H'5A
H'5B
H'5C
DASTCR
8
H'5D
DIVCR
8
H'5E
MSTCR
8
H'5F
CSCR
8
H'60
TSTR
8
H'61
TSNC
8
H'62
TMDR
8
H'63
TFCR
8
H'64
TCR0
8
H'65
TIOR0
8
H'66
TIER0
8
H'67
TSR0
8
H'68
TCNT0H
16
H'69
TCNT0L
H'6A
GRA0H
16
H'6B
GRA0L
H'6C
GRB0H
16
H'6D
GRB0L
H'6E
TCR1
8
H'6F
TIOR1
8
Bit 6
Bit 5
—
—
—
—
—
—
PSTOP
—
MSTOP5 MSTOP4 MSTOP3 MSTOP2 MSTOP1 MSTOP0
CS7E
CS6E
CS5E
—
—
—
—
—
—
—
MDF
FDIR
—
—
CMD1
—
CCLR1
CCLR0
—
IOB2
IOB1
—
—
—
—
—
—
—
CCLR1
CCLR0
—
IOB2
IOB1
Appendix B Internal I/O Register
Bit Names
Bit 4
Bit 3
Bit 2
—
—
—
—
—
—
CS4E
—
—
STR4
STR3
STR2
SYNC4
SYNC3
SYNC2
PWM4
PWM3
PWM2
CMD0
BFB4
BFA4
CKEG1
CKEG0
TPSC2
IOB0
—
IOA2
—
—
OVIE
—
—
OVF
CKEG1
CKEG0
TPSC2
IOB0
—
IOA2
Rev. 3.00 Mar 21, 2006 page 689 of 814
Module
Bit 1
Bit 0
Name
—
DASTE
D/A converter
DIV1
DIV0
System
control
—
—
Bus controller
STR1
STR0
ITU
(all channels)
SYNC1
SYNC0
PWM1
PWM0
BFB3
BFA3
TPSC1
TPSC0
ITU
channel 0
IOA1
IOA0
IMIEB
IMIEA
IMFB
IMFA
TPSC1
TPSC0
ITU
channel 1
IOA1
IOA0
REJ09B0302-0300