Renesas F-ZTAT H8 Series Hardware Manual page 403

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Figure 10.53 shows an example in which GRB3 is buffered by BRB3 in complementary PWM

mode. Buffering is used to set GRB3 to a higher value than GRA3, generating a PWM waveform

with 0% duty cycle. The BRB3 value is transferred to GRB3 when TCNT3 matches GRA3, and

when TCNT4 underflows.

TCNT4 values

Figure 10.53 Register Buffering (Example 3: Buffering in Complementary PWM Mode)

Section 10 16-Bit Integrated Timer Unit (ITU)

Rev. 3.00 Mar 21, 2006 page 375 of 814

REJ09B0302-0300