Renesas F-ZTAT H8 Series Hardware Manual page 190

Section 7 Refresh Controller
Self-Refresh Mode: Some DRAM devices have a self-refresh function. After the SRFMD bit is
set to 1 in RFSHCR, when a transition to software standby mode occurs, the CAS and RAS
outputs go low in that order so that the DRAM self-refresh function can be used. On exit from
software standby mode, the CAS and RAS outputs both go high.
Table 7.7 shows the pin states in software standby mode. Figure 7.6 shows the signal output
timing.
Table 7.7 Pin States in Software Standby Mode (PSRAME = 0, DRAME = 1)
Signal CAS/WE
HWR
High-impedance
LWR
High-impedance
RD
High-impedance
CS
High
3
RFSH
High
Rev. 3.00 Mar 21, 2006 page 162 of 814
REJ09B0302-0300
SRFMD = 0
WE = 0 WE = 1
WE WE WE WE
CAS/WE
High-impedance
High-impedance
High-impedance
High
High
Software Standby Mode
SRFMD = 1 (self-refresh mode)
CAS/WE
High
High
Low
Low
Low
WE = 0 WE = 1
WE WE WE WE
CAS/WE
Low
Low
High
Low
Low