Renesas F-ZTAT H8 Series Hardware Manual page 790

Appendix B Internal I/O Register
P9DDR—Port 9 Data Direction Register
Bit 7
—
Initial value 1
Read/Write —
PADDR—Port A Data Direction Register
Bit
PA DDR
Initial value
Modes
3, 4, 6
Read/Write
Modes
Initial value
1, 2,
Read/Write
5, 7
P9DR—Port 9 Data Register
Bit 7
—
Initial value 1
Read/Write —
Rev. 3.00 Mar 21, 2006 page 762 of 814
REJ09B0302-0300
6 5
— P9 DDR
5
1 0
— W
6 5
7
PA DDR PA DDR
7 6 5
1 0 0
W W
—
0 0 0
W W W
6 5
— P9
5
1 0
— R/W
4 3
P9 DDR P9 DDR
4 3
0 0
W W
Port 9 input/output select
0 Generic input pin
1 Generic output pin
4 3
PA DDR PA DDR
4 3
0 0
W W
0 0
W W
Port A input/output select
0 Generic input pin
1 Generic output pin
4 3
P9 P9
4 3
0 0
R/W R/W
Data for port 9 pins
H'D0
2 1
P9 DDR P9 DDR P9 DDR
2 1
0 0
W W
H'D1
2 1
PA DDR PA DDR
2 1
0 0
W W
0 0
W W
H'D2
2 1
P9 P9
2 1
0 0
R/W R/W
Port 9
0
0
0
W
Port A
0
PA DDR
0
0
W
0
W
Port 9
0
P9
0
0
R/W