7.1.2
Block Diagram
Figure 7.1 shows a block diagram of the refresh controller.
φ/2, φ/8, φ/32,
φ/128, φ/512,
φ/2048, φ/4096
Clock selector
Comparator
Legend:
RTCNT:
Refresh timer counter
RTCOR:
Refresh time constant register
RTMCSR:
Refresh timer control/status register
RFSHCR:
Refresh control register
Module data bus
Figure 7.1 Block Diagram of Refresh Controller
Refresh signal
Control logic
Rev. 3.00 Mar 21, 2006 page 147 of 814
Section 7 Refresh Controller
CMI interrupt
REJ09B0302-0300