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TCNT—Timer Counter
Bit
7
Initial value
0
Read/Write
R/W
RSTCSR—Reset Control/Status Register
Bit
7
WRST
Initial value
0
Read/Write
R/(W)
Watchdog timer reset
0 [Clearing conditions]
1 [Setting condition]
Notes: 1.
Only 0 can be written in bit 7, to clear the flag.
2.
Bit 6 must not be set to 1; in a write, 0 must always be written in this bit.
6
5
0
0
R/W
R/W
6
5
—
—
0
1
1
2
—
—
*
*
• Reset signal input at RES pin
• When WRST= "1", write "0" after reading WRST flag
TCNT overflow generates a reset signal
Appendix B Internal I/O Register
H'A9 (read),
H'A8 (write)
4
3
2
0
0
0
R/W
R/W
R/W
Count value
H'AB (read),
H'AA (write)
4
3
2
—
—
—
1
1
1
—
—
—
Rev. 3.00 Mar 21, 2006 page 745 of 814
WDT
1
0
0
0
R/W
R/W
WDT
1
0
—
—
1
1
—
—
REJ09B0302-0300
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