Renesas F-ZTAT H8 Series Hardware Manual page 497

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In transmitting serial data, the SCI operates as follows.

1. The SCI monitors the TDRE flag in SSR. When the TDRE flag is cleared to 0 the SCI

recognizes that TDR contains new data, and loads this data from TDR into TSR.

2. After loading the data from TDR into TSR, the SCI sets the TDRE flag to 1 and starts

transmitting. If the TIE bit is set to 1 in SCR, the SCI requests a transmit-data-empty

interrupt (TXI) at this time.

Serial transmit data is transmitted in the following order from the TxD pin:

a. Start bit: One 0 bit is output.

b. Transmit data: 7 or 8 bits are output, LSB first.

c. Parity bit or multiprocessor bit: One parity bit (even or odd parity) or one

multiprocessor bit is output. Formats in which neither a parity bit nor a multiprocessor

bit is output can also be selected.

d. Stop bit: One or two 1 bits (stop bits) are output.

e. Mark state: Output of 1 bits continues until the start bit of the next transmit data.

3. The SCI checks the TDRE flag when it outputs the stop bit. If the TDRE flag is 0, the SCI

loads new data from TDR into TSR, outputs the stop bit, then begins serial transmission of

the next frame. If the TDRE flag is 1, the SCI sets the TEND flag to 1 in SSR, outputs the

stop bit, then continues output of 1 bits in the mark state. If the TEIE bit is set to 1 in SCR,

a transmit-end interrupt (TEI) is requested at this time.

Figure 13.6 shows an example of SCI transmit operation in asynchronous mode.

TXI interrupt handler

writes data in TDR and

clears TDRE flag to 0

Figure 13.6 Example of SCI Transmit Operation in Asynchronous Mode

(8-Bit Data with Parity and 1 Stop Bit)

Section 13 Serial Communication Interface

Rev. 3.00 Mar 21, 2006 page 469 of 814

TEI interrupt request

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