Section 7 Refresh Controller
Set P8 DDR to 1 for CS output
1
3
Set RTCOR
Set bits CKS2 to CKS0 in RTMCSR
Write H'47 in RFSHCR
Wait for PSRAM to be initialized
PSRAM can be accessed
Figure 7.18 Setup Procedure for Pseudo-Static RAM
Rev. 3.00 Mar 21, 2006 page 175 of 814
REJ09B0302-0300