Nmi Interrupts And Block Transfer Mode; Memory And I/O Address Register Values - Renesas F-ZTAT H8 Series Hardware Manual

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Section 8 DMA Controller
8.6.6

NMI Interrupts and Block Transfer Mode

If an NMI interrupt occurs in block transfer mode, the DMAC operates as follows.
• When the NMI interrupt occurs, the DMAC finishes transferring the current byte or word, then
clears the DTME bit to 0 and halts. The halt may occur in the middle of a block.
It is possible to find whether a transfer was halted in the middle of a block by checking the
block size counter. If the block size counter does not have its initial value, the transfer was
halted in the middle of a block.
• If the transfer is halted in the middle of a block, the activating interrupt flag is cleared to 0. The
activation request is not held pending.
• While the DTE bit is set to 1 and the DTME bit is cleared to 0, the DMAC is halted and does
not accept activating interrupt requests. If an activating interrupt occurs in this state, the
DMAC does not operate and does not hold the transfer request pending internally. Neither is a
CPU interrupt requested.
For this reason, before setting the DTME bit to 1, first clear the enable bit of the activating
interrupt to 0. Then, after setting the DTME bit to 1, set the interrupt enable bit to 1 again. See
section 8.6.5, Note on Activating DMAC by Internal Interrupts.
• When the DTME bit is set to 1, the DMAC waits for the next transfer request. If it was halted
in the middle of a block transfer, the rest of the block is transferred when the next transfer
request occurs. Otherwise, the next block is transferred when the next transfer request occurs.
8.6.7

Memory and I/O Address Register Values

Table 8.14 indicates the address ranges that can be specified in the memory and I/O address
registers (MAR and IOAR).
Table 8.14 Address Ranges Specifiable in MAR and IOAR
1-Mbyte Mode
MAR
H'00000 to H'FFFFF
(0 to 1048575)
IOAR
H'FFF00 to H'FFFFF
(1048320 to 1048575)
MAR bits 23 to 20 are ignored in 1-Mbyte mode.
Rev. 3.00 Mar 21, 2006 page 242 of 814
REJ09B0302-0300
16-Mbyte Mode
H'000000 to H'FFFFFF
(0 to 16777215)
H'FFFF00 to H'FFFFFF
(16776960 to 16777215)

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