Renesas F-ZTAT H8 Series Hardware Manual page 196

Section 7 Refresh Controller
Example 3: Connection to 2CAS
interconnections to a single 2CAS 4-Mbit DRAM, and the corresponding address map.
Figure 7.12 shows a setup procedure to be followed by a program for this example.
The DRAM in this example has 9-bit row addresses and 9-bit column addresses. Its address area is
H'600000 to H'67FFFF.
H8/3052BF
Figure 7.11 Interconnections and Address Map for 2CAS
Rev. 3.00 Mar 21, 2006 page 168 of 814
REJ09B0302-0300
CAS 4-Mbit DRAM (16-Mbyte Mode): Figure 7.11 shows typical CAS CAS
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a. Interconnections (example)
H'600000
DRAM area
H'67FFFF
H'680000
Not used
H'7FFFFF
b. Address map
2 CAS 4-Mbit DRAM with 9-bit
row address, 9-bit column address,
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and 16-bit organization
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UCAS
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Area 3 (16-Mbyte mode)
CAS 4-Mbit DRAM (Example) CAS CAS
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