Renesas F-ZTAT H8 Series Hardware Manual page 188

Section 7 Refresh Controller
CAS and 2WE CAS CAS WE WE WE Modes: The CAS/WE bit in RFSHCR can select two control modes for 16-bit-
2CAS
wide DRAM: one using UCAS and LCAS; the other using UW and LW. These DRAM pins
correspond to H8/3052BF pins as shown in table 7.6.
Table 7.6 DRAM Pins and H8/3052BF Pins
H8/3052BF Pin
HWR
LWR
RD
CS
3
Figure 7.5 (1) shows the interface timing for 2WE DRAM. Figure 7.5 (2) shows the interface
timing for 2CAS DRAM.
φ
Address
Row
bus
CS
3
(RAS)
RD
(CAS)
HWR
(UW)
LWR
(LW)
RFSH
AS
Note: 16-bit access
*
Figure 7.5 DRAM Control Signal Output Timing (1) (2WE
Rev. 3.00 Mar 21, 2006 page 160 of 814
REJ09B0302-0300
WE WE = 0 (2WE WE
CAS/WE
UW
LW
CAS
RAS
Read cycle
Column Row
DRAM Pin
WE Mode) WE WE
CAS/WE
UCAS
LCAS
WE
RAS
Write cycle
*
Column
WE = 1 (2CAS WE WE CAS Mode) CAS CAS
Refresh cycle
Area 3 top address
WE Mode)
WE WE