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Section 8 DMA Controller
8.2.3
Execute Transfer Count Registers (ETCR)
An execute transfer count register (ETCR) is a 16-bit readable/writable register that specifies the
number of transfers to be executed. These registers function in one way in I/O mode and idle
mode, and another way in repeat mode.
• I/O mode and idle mode
Bit
15
14
Initial value
Read/Write
R/W
R/W
In I/O mode and idle mode, ETCR functions as a 16-bit counter. The count is decremented by
1 each time one transfer is executed. The transfer ends when the count reaches H'0000.
• Repeat mode
Bit
7
Initial value
Read/Write
R/W
Bit
7
Initial value
Read/Write
R/W
Rev. 3.00 Mar 21, 2006 page 194 of 814
REJ09B0302-0300
13
12
11
10
R/W
R/W
R/W
R/W
R/W
Transfer counter
6
5
R/W
R/W
Transfer counter
6
5
R/W
R/W
9
8
7
6
5
Undetermined
R/W
R/W
R/W
R/W
4
3
Undetermined
R/W
R/W
R/W
ETCRH
4
3
Undetermined
R/W
R/W
R/W
ETCRL
Initial count
4
3
2
1
R/W
R/W
R/W
R/W
R/W
2
1
0
R/W
R/W
2
1
0
R/W
R/W
0
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