Renesas F-ZTAT H8 Series Hardware Manual page 387

Setup Procedure for Complementary PWM Mode: Figure 10.33 shows a sample procedure for
setting up complementary PWM mode.
Complementary PWM mode
Stop counting
Select counter clock
Select complementary
PWM mode
Set TCNTs
Set general registers
Start counters
Complementary PWM mode
Note: After exiting complementary PWM mode, to resume operating in complementary
PWM mode, follow the entire setup procedure from step 1 again.
Figure 10.33 Setup Procedure for Complementary PWM Mode (Example)
Section 10 16-Bit Integrated Timer Unit (ITU)
1. Clear bits STR3 and STR4 to 0 in
TSTR to halt the timer counters.
Complementary PWM mode must be
set up while TCNT3 and TCNT4 are
halted.
1
2. Set bits TPSC2 to TPSC0 in TCR to
select the same counter clock source
for channels 3 and 4. If an external
clock source is selected, select the
2
external clock edge(s) with bits
CKEG1 and CKEG0 in TCR. Do not
select any counter clear source with
3 bits CCLR1 and CCLR0 in TCR.
3. Set bits CMD1 and CMD0 in TFCR
to select complementary PWM
mode. TIOCA
4
TIOCB , TOCXA
4
automatically become PWM output
pins.
5
4. Clear TCNT4 to H'0000. Set the non-
overlap margin in TCNT3. Do not set
TCNT3 and TCNT4 to the same
value.
6
5. GRA3 is the waveform period
register. Set the upper limit value of
TCNT3 minus 1 in GRA3. Set
transition times of the PWM output
waveforms in GRB3, GRA4, and
GRB4. Set times within the compare
match range of TCNT3 and TCNT4.
T ≤ X (X: initial setting of GRB3,
GRA4, or GRB4. T: initial setting of
TCNT3)
6. Set bits STR3 and STR4 in TSTR to
1 to start TCNT3 and TCNT4.
Rev. 3.00 Mar 21, 2006 page 359 of 814
, TIOCB , TIOCA ,
3 3 4
, and TOCXB
4 4
REJ09B0302-0300