Renesas F-ZTAT H8 Series Hardware Manual page 399

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Examples of Buffering: Figure 10.49 shows an example in which GRA is set to function as an

output compare register buffered by BRA, TCNT is set to operate as a periodic counter cleared by

GRB compare match, and TIOCA and TIOCB are set to toggle at compare match A and B.

Because of the buffer setting, when TIOCA toggles at compare match A, the BRA value is

simultaneously transferred to GRA. This operation is repeated each time compare match A occurs.

Figure 10.50 shows the transfer timing.

Figure 10.49 Register Buffering (Example 1: Buffering of Output Compare Register)

Section 10 16-Bit Integrated Timer Unit (ITU)

Counter cleared by compare match B

Compare match A

Rev. 3.00 Mar 21, 2006 page 371 of 814

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