Renesas F-ZTAT H8 Series Hardware Manual page 296

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Section 9 I/O Ports
Port 6 Data Register (P6DR)
P6DR is an 8-bit readable/writable register that stores output data for pins P6
register is read, the pin logic level is read for a bit with the corresponding P6DDR bit cleared to 0,
and the P6DR value is read for a bit with the corresponding P6DDR bit set to 1.
Bit
7
Initial value
1
Read/Write
Reserved bit
Bit 7 is reserved, cannot be modified, and always read as 1.
P6DR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Table 9.11 Port 6 Pin Functions in Modes 1 to 6
Pin
Pin Functions and Selection Method
P6
/LWR
Functions as follows regardless of P6
6
P6
Pin function
P6
/HWR
Functions as follows regardless of P6
5
P6
Pin function
P6
/RD
Functions as follows regardless of P6
4
P6
Pin function
Rev. 3.00 Mar 21, 2006 page 268 of 814
REJ09B0302-0300
6
5
P6
P6
6
5
0
0
R/W
R/W
DDR
6
DDR
5
DDR
4
4
3
2
P6
P6
P6
4
3
0
0
0
R/W
R/W
R/W
Port 6 data 6 to 0
These bits store data for port 6 pins
DDR
6
0
LWR output
DDR
5
0
HWR output
DDR
4
0
RD output
to P6
. When this
6
0
1
0
P6
P6
2
1
0
0
0
R/W
R/W
1
1
1

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