Renesas F-ZTAT H8 Series Hardware Manual page 693

Mnemonic
NEG.B Rd
NEG.W Rd
NEG.L ERd
EXTU.W Rd
EXTU.L ERd
EXTS.W Rd
EXTS.L ERd
Operation
0–Rd8 → Rd8
B
0–Rd16 → Rd16
W
0–ERd32 → ERd32
L
0 → (<bits 15 to 8>
W
of Rd16)
0 → (<bits 31 to 16>
L
of ERd32)
(<bit 7> of Rd16) →
W
(<bits 15 to 8> of Rd16)
(<bit 15> of ERd32) →
L
(<bits 31 to 16> of
ERd32)
Addressing Mode and
Instruction Length (bytes)
2
2
2
2
2
2
2
Rev. 3.00 Mar 21, 2006 page 665 of 814
Appendix A Instruction Set
No. of
States
Condition Code
I H N Z V C
—
—
—
— — 0 0 —
— — 0 0 —
— — 0 —
— — 0 —
REJ09B0302-0300
*1
2
2
2
2
2
2
2