Renesas F-ZTAT H8 Series Hardware Manual page 767

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BRB4 H/L—Buffer Register B4 H/L
Bit
15
Initial value
1
Read/Write
R/W
Note: Bit functions are the same as for ITU3.
TPMR—TPC Output Mode Register
Bit
7
Initial value
1
Read/Write
Group 0 non-overlap
0 Normal TPC output in group 0
1 Non-overlapping TPC output in group 0, controlled by compare match
Group 1 non-overlap
0 Normal TPC output in group 1
Output values change at compare match A in the selected ITU channel
1 Non-overlapping TPC output in group 1, controlled by compare match
A and B in the selected ITU channel
Group 2 non-overlap
0 Normal TPC output in group 2
Output values change at compare match A in the selected ITU channel
1 Non-overlapping TPC output in group 2, controlled by compare match
A and B in the selected ITU channel
Group 3 non-overlap
0 Normal TPC output in group 3
Output values change at compare match A in the selected ITU channel
1 Non-overlapping TPC output in group 3, controlled by compare match
A and B in the selected ITU channel
14
13
12
11
10
1
1
1
1
R/W
R/W
R/W
R/W
R/W
6
5
1
1
Output values change at compare match A in the selected ITU channel
A and B in the selected ITU channel
9
8
7
6
1
1
1
1
1
R/W
R/W
R/W
R/W
4
3
G3NOV
1
0
R/W
Rev. 3.00 Mar 21, 2006 page 739 of 814
Appendix B Internal I/O Register
H'9E, H'9F
5
4
3
2
1
1
1
1
R/W
R/W
R/W
R/W
H'A0
2
1
G2NOV
G1NOV
0
0
R/W
R/W
REJ09B0302-0300
ITU4
1
0
1
1
R/W
R/W
TPC
0
G0NOV
0
R/W

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