Renesas F-ZTAT H8 Series Hardware Manual page 801

BRCR—Bus Release Control Register
Bit
A23E
Modes
Initial value
1, 2,
Read/Write
5, 7
Initial value
Modes
3, 4, 6
Read/Write R/W
Address 23 to 21 enable
ISCR—IRQ Sense Control Register
Bit 7
—
Initial value 0
Read/Write R/W
7 6 5
A22E A21E
1 1 1
— — —
1 1 1
R/W R/W
0 Address output
1 Other input/output
6 5
— IRQ5SC
0 0
R/W R/W
IRQ to IRQ sense control
5
0 Interrupts are requested when IRQ to IRQ inputs are low
1 Interrupts are requested by falling-edge input at IRQ to IRQ
4 3
— —
1 1
— —
1 1
— —
Bus release enable
0 The bus cannot be released to an external device
1 The bus can be released to an external device
4 3
IRQ4SC IRQ3SC
0 0
R/W R/W
0
Rev. 3.00 Mar 21, 2006 page 773 of 814
Appendix B Internal I/O Register
H'F3 Bus controller
2 1
— —
1 1
— —
1 1
— —
H'F4 Interrupt controller
2 1
IRQ2SC IRQ1SC
0 0
R/W R/W
5 0
REJ09B0302-0300
0
BRLE
0
R/W
0
R/W
0
IRQ0SC
0
R/W
5 0