Software Standby Mode; Transition To Software Standby Mode; Exit From Software Standby Mode - Renesas F-ZTAT H8 Series Hardware Manual

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Section 20 Power-Down State

Software Standby Mode

To enter software standby mode, execute the SLEEP instruction while the SSBY bit is set to 1 in

In software standby mode, current dissipation is reduced to an extremely low level because the

CPU, clock, and on-chip supporting modules all halt. The DMAC and on-chip supporting modules

are reset. As long as the specified voltage is supplied, however, CPU register contents and on-chip

RAM data are retained. The settings of the I/O ports and refresh controller* are also held.

Note: * RTCNT and bits 7 and 6 of RTMCSR are initialized. Other bits and registers hold their

previous states.

Software standby mode can be exited by input of an external interrupt at the NMI, IRQ

pin, or by input at the RES or STBY pin.

Exit by Interrupt: When an NMI, IRQ

clock oscillator begins operating. After the oscillator settling time selected by bits STS2 to STS0

in SYSCR, stable clock signals are supplied to the entire chip, software standby mode ends, and

interrupt exception handling begins. Software standby mode is not exited if the interrupt enable

bits of interrupts IRQ

RES Input: When the RES input goes low, the clock oscillator starts and clock pulses are

supplied immediately to the entire chip. The RES signal must be held low long enough for the

clock oscillator to stabilize. When RES goes high, the CPU starts reset exception handling.

Exit by STBY

STBY Input: Low input at the STBY pin causes a transition to hardware standby mode.

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are cleared to 0, or if these interrupts are masked in the

interrupt request signal is received, the