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9.7.2
Register Configuration
Table 9.10 summarizes the registers of port 6.
Table 9.10 Port 6 Registers
Address *
Name
H'FFC9
Port 6 data direction
register
H'FFCB
Port 6 data register
Note: * Lower 16 bits of the address.
Port 6 Data Direction Register (P6DDR)
P6DDR is an 8-bit write-only register that can select input or output for each pin in port 6.
Bit
7
—
Initial value
1
Read/Write
—
Reserved bit
• Modes 1 to 6 (Expanded Modes)
function as bus control output pins (LWR, HWR, RD, AS). P6
P6
to P6
6
3
input/output pins, functioning as output port when bits P6
input port when these bits are cleared to 0.
• Mode 7 (Single-Chip Mode)
Port 6 is a generic input/output port. A pin in port 6 becomes an output port if the
corresponding P6DDR bit is set to 1, and an input port if this bit is cleared to 0.
Bit 7 is reserved.
P6DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P6DDR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. If a P6DDR bit is set to 1, the corresponding pin maintains its output
state in software standby mode.
Abbreviation
P6DDR
P6DR
6
5
P6 DDR
P6 DDR
P6 DDR
6
5
0
0
W
W
Port 6 data direction 6 to 0
These bits select input or output for port 6 pins
R/W
Mode 1 to 5
W
H'F8
R/W
H'80
4
3
2
P6 DDR
P6 DDR
4
3
2
0
0
0
W
W
W
DDR to P6
2
Rev. 3.00 Mar 21, 2006 page 267 of 814
Section 9 I/O Ports
Initial Value
Mode 6, 7
H'80
H'80
1
0
P6 DDR
P6 DDR
1
0
0
0
W
W
to P6
are generic
2
0
DDR are set to 1 and
0
REJ09B0302-0300
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