Renesas F-ZTAT H8 Series Hardware Manual page 32

Section 1 Overview
Feature Description
16-bit integrated •
timer unit (ITU)
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Programmable
timing pattern
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controller (TPC)
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Watchdog timer
(WDT),
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1 channel
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Serial
communication
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interface (SCI),
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2 channels
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A/D converter
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Rev. 3.00 Mar 21, 2006 page 4 of 814
REJ09B0302-0300
Five 16-bit timer channels, capable of processing up to 12 pulse outputs or
10 pulse inputs
16-bit timer counter (channels 0 to 4)
Two multiplexed output compare/input capture pins (channels 0 to 4)
Operation can be synchronized (channels 0 to 4)
PWM mode available (channels 0 to 4)
Phase counting mode available (channel 2)
Buffering available (channels 3 and 4)
Reset-synchronized PWM mode available (channels 3 and 4)
Complementary PWM mode available (channels 3 and 4)
DMAC can be activated by compare match/input capture A interrupts
(channels 0 to 3)
Maximum 16-bit pulse output, using ITU as time base
Up to four 4-bit pulse output groups (or one 16-bit group, or two 8-bit groups)
Non-overlap mode available
Output data can be transferred by DMAC
Reset signal can be generated by overflow
Usable as an interval timer
Selection of asynchronous or synchronous mode
Full duplex: can transmit and receive simultaneously
On-chip baud-rate generator
Smart card interface functions added (SCI0 only)
Resolution: 10 bits
Eight channels, with selection of single or scan mode
Variable analog conversion voltage range
Sample-and-hold function
A/D conversion can be externally triggered