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Section 10 16-Bit Integrated Timer Unit (ITU)
TCLKA to
TCLKD
φ, φ/2,
φ/4, φ/8
Legend:
TCNT4:
Timer counter 4 (16 bits)
GRA4, GRB4:
General registers A4 and B4 (input capture/output compare registers)
(16 bits
BRA4, BRB4:
Buffer registers A4 and B4 (input capture/output compare buffer registers)
(16 bits
TCR4:
Timer control register 4 (8 bits)
TIOR4:
Timer I/O control register 4 (8 bits)
TIER4:
Timer interrupt enable register 4 (8 bits)
TSR4:
Timer status register 4 (8 bits)
Rev. 3.00 Mar 21, 2006 page 310 of 814
REJ09B0302-0300
Clock selector
Comparator
Module data bus
×
2)
×
2)
Figure 10.5 Block Diagram of Channel 4
Control logic
TOCXA
4
TOCXB
4
TIOCA
4
TIOCB
4
IMIA4
IMIB4
OVI4
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