Renesas F-ZTAT H8 Series Hardware Manual page 333

Table 10.1 summarizes the ITU functions.
Table 10.1 ITU Functions
Item
Clock sources
General registers
(output compare/input
capture registers)
Buffer registers
Input/output pins
Output pins
Counter clearing function
Compare match 0
output
1
Toggle
Input capture function
Synchronization
PWM mode
Reset-synchronized
PWM mode
Complementary PWM
mode
Phase counting mode
Buffering
DMAC activation
Interrupt sources
Legend:
: Available
O
—: Not available
Channel 0 Channel 1
Internal clocks: φ, φ/2, φ/4, φ/8
External clocks: TCLKA, TCLKB, TCLKC, TCLKD, selectable independently
GRA0, GRB0 GRA1, GRB1
— —
TIOCA , TIOCA
0 1
TIOCB TIOCB
0 1
— —
GRA0/GRB0 GRA1/GRB1
compare compare
match or match or
input capture input capture
O O
O O
O O
O O
O O
O O
— —
— —
— —
— —
GRA0 compare GRA1 compare
match or input match or input
capture capture
Three sources Three sources
• Compare • Compare
match/input match/input
capture A0 capture A1
• Compare • Compare
match/input match/input
capture B0 capture B1
• Overflow • Overflow
Section 10 16-Bit Integrated Timer Unit (ITU)
Channel 2
GRA2, GRB2
—
, TIOCA ,
2
TIOCB
2
—
GRA2/GRB2
compare
match or
input capture
O
O
—
O
O
O
—
—
O
—
GRA2 compare
match or input
capture
Three sources
• Compare
match/input
capture A2
• Compare
match/input
capture B2
• Overflow
Rev. 3.00 Mar 21, 2006 page 305 of 814
Channel 3 Channel 4
GRA3, GRB3 GRA4, GRB4
BRA3, BRB3 BRA4, BRB4
TIOCA , TIOCA
3 4
TIOCB TIOCB
3 4
— TOCXA
TOCXB
GRA3/GRB3 GRA4/GRB4
compare compare
match or match or
input capture input capture
O O
O O
O O
O O
O O
O O
O O
O O
— —
O O
GRA3 compare —
match or input
capture
Three sources Three sources
• Compare • Compare
match/input match/input
capture A3 capture A4
• Compare • Compare
match/input match/input
capture B3 capture B4
• Overflow • Overflow
REJ09B0302-0300
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4
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