Usage Notes; Operation Of Tpc Output Pins; Note On Non-Overlapping Output - Renesas F-ZTAT H8 Series Hardware Manual

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Section 11 Programmable Timing Pattern Controller
11.4

Usage Notes

11.4.1

Operation of TPC Output Pins

TP
to TP
are multiplexed with ITU, DMAC, address bus, and other pin functions. When ITU,
0
15
DMAC, or address output is enabled, the corresponding pins cannot be used for TPC output. The
data transfer from NDR bits to DR bits takes place, however, regardless of the usage of the pin.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
11.4.2

Note on Non-Overlapping Output

During non-overlapping operation, the transfer of NDR bit values to DR bits takes place as
follows.
1. NDR bits are always transferred to DR bits at compare match A.
2. At compare match B, NDR bits are transferred only if their value is 0. Bits are not transferred
if their value is 1.
Figure 11.9 illustrates the non-overlapping TPC output operation.
DDR
TPC output pin
Rev. 3.00 Mar 21, 2006 page 420 of 814
REJ09B0302-0300
NDER
Q
Q
C
Q
DR
Figure 11.9 Non-Overlapping TPC Output
Compare match A
Compare match B
D
Q
Internal
NDR
D
data bus

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