Renesas F-ZTAT H8 Series Hardware Manual page 673

φ
A to A
23 0
AS
RD (read)
D to D
15 0
(read)
HWR, LWR
(write)
D to D
15 0
(write)
Figure 21.5 Basic Bus Cycle: Three-State Access
T T
1 2
t
ACC4
t
ACC4
t
ACC2
t
WSD
t
AS2
t
WDS2
Section 21 Electrical Characteristics
T
3
t
RDS
t
WSW2
Rev. 3.00 Mar 21, 2006 page 645 of 814
REJ09B0302-0300