Timer Synchro Register (Tsnc) - Renesas F-ZTAT H8 Series Hardware Manual

Section 10 16-Bit Integrated Timer Unit (ITU)
Bit 1—Counter Start 1 (STR1): Starts and stops timer counter 1 (TCNT1).
Bit 1: STR1 Description
0 TCNT1 is halted
1 TCNT1 is counting
Bit 0—Counter Start 0 (STR0): Starts and stops timer counter 0 (TCNT0).
Bit 0: STR0 Description
0 TCNT0 is halted
1 TCNT0 is counting
10.2.2

Timer Synchro Register (TSNC)

TSNC is an 8-bit readable/writable register that selects whether channels 0 to 4 operate
independently or synchronously. Channels are synchronized by setting the corresponding bits to 1.
Bit 7
—
Initial value 1
Read/Write —
TSNC is initialized to H'E0 by a reset and in standby mode.
Bits 7 to 5—Reserved: Read-only bits, always read as 1.
Bit 4—Timer Sync 4 (SYNC4): Selects whether channel 4 operates independently or
synchronously.
Bit 4: SYNC4 Description
0 Channel 4's timer counter (TCNT4) operates independently
TCNT4 is preset and cleared independently of other channels
1 Channel 4 operates synchronously
TCNT4 can be synchronously preset and cleared
Rev. 3.00 Mar 21, 2006 page 316 of 814
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6 5
— —
1 1
— —
Reserved bits
4 3
SYNC4 SYNC3 SYNC2
0 0
R/W R/W R/W
Timer sync 4 to 0
These bits synchronize
channels 4 to 0
(Initial value)
(Initial value)
2 1 0
SYNC1 SYNC0
0 0 0
R/W R/W
(Initial value)