Acceptance Of Eit Events; Saving And Restoring The Pc And Psw - Renesas M32R/ECU Series User Manual

4

4.5 Acceptance of EIT Events

When an EIT event occurs, the CPU suspends the program it has hitherto been executing and branches to EIT
processing by the relevant handler. Conditions under which each EIT event occurs and the timing at which they are
accepted are shown below.
Table 4.5.1 Acceptance of EIT Events
EIT Event
Reserved Instruction
Exception (RIE)
Address Exception (AE)
Floating-Point Exception
(FPE)
Reset Interrupt (RI)
System Break Interrupt
(SBI)
External Interrupt (EI)
Trap (TRAP)

4.6 Saving and Restoring the PC and PSW

The following describes operation of the microcomputer at the time when it accepts an EIT and when it executes the
RTE instruction.
(1) Hardware preprocessing when an EIT is accepted
[1] Save the PSW register's SM, IE and C bits in its backup field.
←
BSM
←
BIE
←
BC
[2] Update the PSW register's SM, IE and C bits
←
SM
←
IE
←
C
[3] Save the PC register
←
BPC
[4] Set the vector address in the PC register
Branches to the EIT vector and executes the branch (BRA) instruction written in it, thereby transferring
control to the user-created EIT handler.
(2) Hardware postprocessing when the RTE instruction is executed
[A] Restore the PSW register's SM, IE and C bits from its backup field.
←
SM
←
IE
←
C
[B] Restore the PC register from the BPC register.
←
PC
Note: • The values stored in the BPC and the PSW register's BSM, BIE and BC bits after executing the RTE
instruction are undefined.
Type of Processing
Instruction processing-
canceled type
Instruction processing-
canceled type
Instruction processing-
completed type
Instruction processing-
aborted type
Instruction processing-
completed type
Instruction processing-
completed type
Instruction processing-
completed type
SM
IE
C
Remains unchanged (RIE, AE, FPE, TRAP) or cleared to "0" (SBI, EI, RI)
Cleared to "0"
Cleared to "0"
PC
BSM
BIE
BC
BPC
Acceptance Timing
During instruction execution
During instruction execution
Break in instructions
Each machine cycle
Break in instructions
(word boundary only)
Break in instructions
(word boundary only)
Break in instructions
4-8
4.5 Acceptance of EIT Events
Values Set in BPC Register
PC value of the instruction that
generated RIE
PC value of the instruction that
generated AE
PC value of the instruction that
generated FPE + 4
Undefined value
PC value of the next instruction
PC value of the next instruction
PC value of TRAP instruction + 4
32180 Group User's Manual (Rev.1.0)
EIT