Renesas M32R/ECU Series User Manual page 231

9
Data bus
Figure 9.2.4 Block Diagram of DMA Transfer Interrupt Request 0
Data bus
Figure 9.2.5 Block Diagram of DMA Transfer Interrupt Request 1
DM04ITST (H'0080 0400)
DM04ITMK (H'0080 0401)
DMA4UDF
DMITST4
b3
F/F
DMITMK4
b11
F/F
DMA3UDF
DMITST3
b4
F/F
DMITMK3
b12
F/F
DMA2UDF
DMITST2
b5
F/F
DMITMK2
b13
F/F
DMA1UDF
DMITST1
b6
F/F
DMITMK1
b14
F/F
DMA0UDF
DMITST0
b7
F/F
DMITMK0
b15
F/F
DM59ITST (H'0080 0408)
DM59ITMK (H'0080 0409)
DMA9UDF
DMITST9
b3
F/F
DMITMK9
b11
F/F
DMA8UDF
DMITST8
b4
F/F
DMITMK8
b12
F/F
DMA7UDF
DMITST7
b5
F/F
DMITMK7
b13
F/F
DMA6UDF
DMITST6
b6
F/F
DMITMK6
b14
F/F
DMA5UDF
DMITST5
b7
F/F
DMITMK5
b15
F/F
9.2 DMAC Related Registers
5-source inputs
DMA transfer interrupt request 0
(Level)
5-source inputs
DMA transfer interrupt request 1
(Level)
9-26
32180 Group User's Manual (Rev.1.0)
DMAC