Renesas M32R/ECU Series User Manual page 503

Mitsubishi 32-bit risc single-chip microcomputers
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12
(1) SIOn transmit interrupt request source select bit
[When set to "0"]
The transmit buffer empty interrupt is selected. A transmit buffer empty interrupt request is generated
when data is transferred from the transmit buffer register to the transmit shift register. Also, a transmit
buffer empty interrupt request is generated when the TEN (Transmit Enable) bit is set to "1" (interrupt
enabled).
[When set to "1"]
The transmission finished (transmit shift buffer empty) interrupt is selected. A transmission finished
interrupt request is generated when all of the data in the transmit shift register has been transferred.
Note: • Do not select the transmission finished interrupt when an external clock is selected in CSIO
(2) SIOn receive interrupt request source select bit
[When set to "0"]
The reception finished (receive buffer full) interrupt is selected. A reception finished interrupt request is
also generated when a receive error (except overrun error) occurs.
[When set to "1"]
The receive error interrupt is selected. Following types of errors constitute a receive error:
• CSIO mode: Overrun error
• UART mode: Overrun, parity and framing errors
mode.
12.2 Serial I/O Related Registers
12-12
Serial I/O
32180 Group User's Manual (Rev.1.0)

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