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10
10.2.5 Output Flip-flop Control Unit
The Output Flip-flop Control Unit controls the flip-flops (F/F) provided for each timer. Following flip-flop control
registers are included:
• F/F6–15 Source Select Register (FF615S)
• F/F16–19 Source Select Register (FF1619S)
• F/F0–15 Protect Register (FF015P)
• F/F16–20 Protect Register (FF1620P)
• F/F21–28 Protect Register (FF2128P)
• F/F29–36 Protect Register (FF2936P)
• F/F37–44 Protect Register (FF3744P)
• F/F0–15 Data Register (FF015D)
• F/F16–20 Data Register (FF1620D)
• F/F21–28 Data Register (FF2128D)
• F/F29–36 Data Register (FF2936D)
• F/F37–44 Data Register (FF3744D)
The timing at which signals are generated to the output flip-flop by each timer are shown in Table 10.2.5. (Note
that this timing is different from one at which signals are output from the timer to the output event bus.)
MULTIJUNCTION TIMERS
10.2 Common Units of Multijunction Timers
10-26
32180 Group User's Manual (Rev.1.0)
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