Renesas M32R/ECU Series User Manual page 494

Mitsubishi 32-bit risc single-chip microcomputers
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12
Table 12.1.2 Interrupt Generation Functions of Serial I/O
Serial I/O Interrupt Request Source
SIO0 transmit buffer empty or transmission finished
SIO0 reception finished or receive error
SIO1 transmit buffer empty or transmission finished
SIO1 reception finished or receive error
SIO2 transmit buffer empty or transmission finished
SIO2 reception finished or receive error
SIO3 transmit buffer empty or transmission finished
SIO3 reception finished or receive error
SIO4 transmit buffer empty or transmission finished
SIO4 reception finished or receive error
SIO5 transmit buffer empty or transmission finished
SIO5 reception finished or receive error
Note: • The transmission-finished interrupt is effective when the internal clock is selected in UART or CSIO mode.
Table 12.1.3 DMA Transfer Request Generation Functions of Serial I/O
Serial I/O DMA Transfer Request
SIO0 transmit buffer empty
SIO0 reception finished
SIO1 transmit buffer empty
SIO1 reception finished
SIO2 transmit buffer empty
SIO2 reception finished
SIO3 transmit buffer empty
SIO3 reception finished
ICU Interrupt Sources
SIO0 transmit interrupt
SIO0 receive interrupt
SIO1 transmit interrupt
SIO1 receive interrupt
SIO2,3 transmit/receive interrupt (group interrupt)
SIO2,3 transmit/receive interrupt (group interrupt)
SIO2,3 transmit/receive interrupt (group interrupt)
SIO2,3 transmit/receive interrupt (group interrupt)
SIO4,5 transmit/receive interrupt (group interrupt)
SIO4,5 transmit/receive interrupt (group interrupt)
SIO4,5 transmit/receive interrupt (group interrupt)
SIO4,5 transmit/receive interrupt (group interrupt)
DMAC Input Channels
DMA3, DMA4
DMA4
DMA6
DMA6, DMA3
DMA7
DMA5
DMA7, DMA9
DMA8
12-3
Serial I/O
12.1 Outline of Serial I/O
32180 Group User's Manual (Rev.1.0)

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