Table of Contents
Advertisement
8
Port Group 0,1 Input Level Setting Register (PG01LEV)
b0
1
2
WF0SEL PT0SEL VT0SEL0 VT0SEL1 WF1SEL PT1SEL VT1SEL0 VT1SEL1
0
0
0
Port Group 2,3 Input Level Setting Register (PG23LEV)
b8
9
10
WF2SEL PT2SEL VT2SEL0 VT2SEL1 WF3SEL PT3SEL VT3SEL0 VT3SEL1
0
0
0
Port Group 4,5 Input Level Setting Register (PG45LEV)
b0
1
2
WF4SEL PT4SEL VT4SEL0 VT4SEL1 WF5SEL PT5SEL VT5SEL0 VT5SEL1
0
0
0
Port Group 6,7 Input Level Setting Register (PG67LEV)
b8
9
10
WF6SEL PT6SEL VT6SEL0 VT6SEL1 WF7SEL PT7SEL VT7SEL0 VT7SEL1
0
0
0
Port Group 8 Input Level Setting Register (PG8LEV)
b0
1
2
WF8SEL PT8SEL VT8SEL0 VT8SEL1
0
0
0
Note: • The PG8LEV register bits 4–7 have no functions assigned.
b
Bit Name
0(4)
WFnSEL
8(12)
Group n dual-function input select bit
1(5)
PTnSEL
9(13)
Group n port input select bit
2–3
VTnSEL
(6–7)
Group n input threshold select bit
10–11
(14–15)
Note: • The following ports operate with the VCC-BUS power supply, and not with the VCCE power supply. Therefore, the reference
voltages for these ports are the VCC-BUS input voltage.
P00–P07, P10–P17, P20–P27, P30–P37, P41–P47, P70–P73, P224–P227
INPUT/OUTPUT PORTS AND PIN FUNCTIONS
3
4
5
6
1
0
0
0
11
12
13
14
1
0
0
0
3
4
5
6
1
0
0
0
11
12
13
14
1
0
0
0
3
4
5
6
1
0
0
0
8.4 Port Input Level Switching Function
b7
1
b15
1
b7
1
b15
1
b7
0
Function
0: Select standard input for each pin
1: Select threshold switching function
0: Select CMOS input
1: Select Schmitt input
<When PTnSEL = "0" (CMOS input selected)>
00: Select 0.35 VCCE
01: Select 0.5 VCCE
10: Select 0.7 VCCE
11: Settings inhibited
<When PTnSEL = "1" (Schmitt input selected)>
00: VT+ = 0.5 VCCE
VT– = 0.35 VCCE
01: Settings inhibited
10: VT+ = 0.7 VCCE
VT– = 0.35 VCCE
11: VT+ = 0.7 VCCE
VT– = 0.5VCCE
8-25
<Address: H'0080 0760>
<Address: H'0080 0761>
<Address: H'0080 0762>
<Address: H'0080 0763>
<Address: H'0080 0764>
<After reset: B'0001>
R
R
R
R
32180 Group User's Manual (Rev.1.0)
W
W
W
W
Hide quick links:
Advertisement
Table of Contents
