Renesas M32R/ECU Series User Manual page 58

3
0
+0 address +1 address
H'0080 0000
Interrupt Controller
H'0080 007E
H'0080 0080
A-D0 Converter
H'0080 00EE
H'0080 0100
Serial I/O 0–3
H'0080 0146
H'0080 0180
Wait Controller
H'0080 0186
H'0080 01E0
Flash control
H'0080 01F8
H'0080 0200
MJT (common part)
H'0080 023E
H'0080 0240
H'0080 02FE
H'0080 0300
H'0080 03BE
H'0080 03C0
H'0080 03D8
H'0080 03E0
H'0080 03FE
H'0080 0400
H'0080 0478
H'0080 0700
Input/output port
H'0080 077F
Note: • The Real-time Debugger (RTD) is an independent module that is operated from the outside, and is transparent to
the CPU.
Figure 3.4.2 Outline Mapping of the SFR Area
7 8 15
(ICU)
MJT(TOP)
Multijunction
MJT(TIO)
timer (MJT)
MJT(TMS)
MJT(TML0)
DMAC
3.4 Internal RAM and SFR Areas
0
+0 address +1 address
H'0080 078C
MJT(TID0)
H'0080 078E
H'0080 0790
MJT(TOU0)
H'0080 07E2
H'0080 0A00
Serial I/O 4–5
H'0080 0A26
H'0080 0A80
A-D1 Converter
H'0080 0AEE
H'0080 0B8C
MJT(TID1)
H'0080 0B8E
H'0080 0B90
MJT(TOU1)
H'0080 0BE2
H'0080 0C8C
MJT(TID2)
H'0080 0C8E
H'0080 0C90
MJT(TOU2)
H'0080 0CE2
H'0080 0FE0
MJT(TML1)
H'0080 0FFE
H'0080 1000
H'0080 11FE
H'0080 1400
H'0080 15FE
32180 Group User's Manual (Rev.1.0)
3-7
ADDRESS SPACE
7 8 15
Multijunction
timer (MJT)
Multijunction
timer (MJT)
CAN0
CAN1