Interrupt Request Sources In Internal Peripheral I/O - Renesas M32R/ECU Series User Manual

5

5.3 Interrupt Request Sources in Internal Peripheral I/O

The Interrupt Controller receives as inputs the interrupt requests from MJT (multijunction timer), DMAC, serial I/O,
A-D converter, RTD and CAN. For details about these interrupts, see each section in which the relevant internal
peripheral I/O is described.
Table 5.3.1 Interrupt Request Sources in Internal Peripheral I/O
Interrupt Request Sources
TIN3–6 input interrupt request
TIN20–29 input interrupt request TIN20–TIN29 inputs
TIN12–19 input interrupt request TIN12–TIN19 inputs
TIN0–2 input interrupt request
TIN7–11 input interrupt request
TMS0,1 output interrupt request
TOP8,9 output interrupt request
TOP10 output interrupt request
TIO4–7 output interrupt request
TIO8,9 output interrupt request
TOP0–5 output interrupt request TOP0–TOP5 outputs
TOP6,7 output interrupt request
TIO0–3 output interrupt request
DMA0-4 interrupt request
SIO1 receive interrupt request
SIO1 transmit interrupt request
SIO0 receive interrupt request
SIO0 transmit interrupt request
A-D0 conversion interrupt request
TID0 output interrupt request
TOU0 output interrupt request
DMA5–9 interrupt request
SIO2,3 transmit/receive interrupt SIO2,3 reception-completed or receive error interrupt,
request
RTD interrupt request
TID1 output interrupt request
TOU1,2 output interrupt request
SIO4,5 transmit/receive interrupt SIO4,5 reception-completed or receive error interrupt,
request
A-D1 conversion interrupt request
TID2 output interrupt request
TIN30–33 input interrupt request TIN30–TIN33 inputs
CAN0 transmit/receive & error
interrupt request
CAN1 transmit/receive & error
interrupt request
Note 1: ICU type of input source
• Edge-recognized: Interrupt requests are generated on a falling edge of the interrupt signal supplied to the ICU.
• Level-recognized: Interrupt requests are generated when the interrupt signal supplied to the ICU is held low. For
this type of interrupt, the ICU's Interrupt Control Register IRQ bit cannot be set or cleared in software.
5.3 Interrupt Request Sources in Internal Peripheral I/O
Contents
TIN3–TIN6 inputs
TIN0–TIN2 inputs
TIN7–TIN11 inputs
TMS0, TMS1 output
TOP8, TOP9 output
TOP10 output
TIO4–TIO7 outputs
TIO8, TIO9 outputs
TOP6–TOP7 outputs
TIO0–TIO3 outputs
DMA0–4 transfer completed
SIO1 reception-completed or receive error interrupt
SIO1 transmission-completed or transmit buffer empty
interrupt
SIO0 reception-completed or receive error interrupt
SIO0 transmission-completed or transmit buffer empty
interrupt
A-D0 converter's scan mode one-shot operation,
single mode or comparate mode completed
TID0 output
TOU0_0–TOU0_7 outputs
DMA5–9 transfer completed
transmission-completed or transmit buffer empty interrupt
RTD interrupt generation command
TID1 output
TOU1_0–TOU1_7 outputs, TOU2_0–TOU2_7 outputs
transmission-completed or transmit buffer empty interrupt
A-D1 converter's scan mode one-shot operation,
single mode or comparate mode completed
TID2 output
CAN0 transmission or reception completed, CAN0 error
passive, CAN0 error bus-off, CAN0 bus error, single shot
CAN1 transmission or reception completed, CAN1 error
passive, CAN1 error bus-off, CAN1 bus error, single shot
5-11
INTERRUPT CONTROLLER (ICU)
Number of
Input Sources
4
10
8
3
5
2
2
1
4
2
6
2
4
5
1
1
1
1
1
1
8
5
4
1
1
16
4
1
1
4
35
35
32180 Group User's Manual (Rev.1.0)
ICU Type of Input
Source ( Note 1)
Level-recognized
Level-recognized
Level-recognized
Level-recognized
Level-recognized
Level-recognized
Level-recognized
Edge-recognized
Level-recognized
Level-recognized
Level-recognized
Level-recognized
Level-recognized
Level-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Edge-recognized
Level-recognized
Level-recognized
Level-recognized
Edge-recognized
Edge-recognized
Level-recognized
Level-recognized
Edge-recognized
Edge-recognized
Level-recognized
Level-recognized
Level-recognized