Renesas M32R/ECU Series User Manual page 60

3
SFR Area Register Map (2/27)
Address
b0
H'0080 009C
H'0080 009E
H'0080 00A0
H'0080 00A2
H'0080 00A4
H'0080 00A6
H'0080 00A8
H'0080 00AA
H'0080 00AC
H'0080 00AE
|
H'0080 00D0
H'0080 00D2
H'0080 00D4
H'0080 00D6
H'0080 00D8
H'0080 00DA
H'0080 00DC
H'0080 00DE
H'0080 00E0
H'0080 00E2
H'0080 00E4
H'0080 00E6
H'0080 00E8
H'0080 00EA
H'0080 00EC
H'0080 00EE
|
H'0080 0100 SIO23 Interrupt Request Status Register
H'0080 0102 SIO03 Interrupt Request Source Select Register
|
H'0080 0110 SIO0 Transmit Control Register
H'0080 0112
H'0080 0114
+0 address
10-bit A-D0 Data Register 6
10-bit A-D0 Data Register 7
10-bit A-D0 Data Register 8
10-bit A-D0 Data Register 9
10-bit A-D0 Data Register 10
10-bit A-D0 Data Register 11
10-bit A-D0 Data Register 12
10-bit A-D0 Data Register 13
10-bit A-D0 Data Register 14
10-bit A-D0 Data Register 15
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(SI23STAT)
(SI03SEL)
(Use inhibited area)
(S0TCNT)
SIO0 Transmit Buffer Register
SIO0 Receive Buffer Register
3.4 Internal RAM and SFR Areas
+1 address
b7 b8
(AD0DT6)
(AD0DT7)
(AD0DT8)
(AD0DT9)
(AD0DT10)
(AD0DT11)
(AD0DT12)
(AD0DT13)
(AD0DT14)
(AD0DT15)
8-bit A-D0 Data Register 0
(AD08DT0)
8-bit A-D0 Data Register 1
(AD08DT1)
8-bit A-D0 Data Register 2
(AD08DT2)
8-bit A-D0 Data Register 3
(AD08DT3)
8-bit A-D0 Data Register 4
(AD08DT4)
8-bit A-D0 Data Register 5
(AD08DT5)
8-bit A-D0 Data Register 6
(AD08DT6)
8-bit A-D0 Data Register 7
(AD08DT7)
8-bit A-D0 Data Register 8
(AD08DT8)
8-bit A-D0 Data Register 9
(AD08DT9)
8-bit A-D0 Data Register 10
(AD08DT10)
8-bit A-D0 Data Register 11
(AD08DT11)
8-bit A-D0 Data Register 12
(AD08DT12)
8-bit A-D0 Data Register 13
(AD08DT13)
8-bit A-D0 Data Register 14
(AD08DT14)
8-bit A-D0 Data Register 15
(AD08DT15)
SIO03 Interrupt Request Enable Register
(SI03EN)
(Use inhibited area)
SIO0 Transmit/Receive Mode Register
(S0MOD)
(S0TXB)
(S0RXB)
3-9
ADDRESS SPACE
b15
32180 Group User's Manual (Rev.1.0)
See pages
11-31
11-31
11-31
11-31
11-31
11-31
11-31
11-31
11-31
11-31
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
11-32
12-9
12-10
12-11
12-14
12-15
12-18
12-19