Renesas M32R/ECU Series User Manual page 230

9
DMA0–4 Interrupt Request Mask Register (DM04ITMK)
b8 9 10
DMITMK4 DMITMK3
0 0 0
b Bit Name
8–10 No function assigned. Fix to "0".
11 DMITMK4 (DMA4 interrupt request mask bit)
12 DMITMK3 (DMA3 interrupt request mask bit)
13 DMITMK2 (DMA2 interrupt request mask bit)
14 DMITMK1 (DMA1 interrupt request mask bit)
15 DMITMK0 (DMA0 interrupt request mask bit)
DMA5–9 Interrupt Request Mask Register (DM59ITMK)
b8 9 10
DMITMK9 DMITMK8
0 0 0
b Bit Name
8–10 No function assigned. Fix to "0".
11 DMITMK9 (DMA9 interrupt request mask bit)
12 DMITMK8 (DMA8 interrupt request mask bit)
13 DMITMK7 (DMA7 interrupt request mask bit)
14 DMITMK6 (DMA6 interrupt request mask bit)
15 DMITMK5 (DMA5 interrupt request mask bit)
The DMA Interrupt Request Mask Register is used to mask interrupt requests on each DMA channel.
(1) DMITMKn (DMAn Interrupt Request Mask) bit (n = 0–9)
Setting the DMAn interrupt request mask bit to "1" masks the interrupt requests on DMAn channel. However,
if an interrupt request occurs, the DMAn interrupt request status bit is always set to "1" irrespective of the
contents of this mask register.
11 12 13 14
DMITMK2 DMITMK1 DMITMK0
0 0 0 0
11 12 13 14
DMITMK7 DMITMK6 DMITMK5
0 0 0 0
b15
0
Function
0: Enable interrupt request
1: Mask (disable) interrupt request
b15
0
Function
0: Enable interrupt request
1: Mask (disable) interrupt request
9-25
9.2 DMAC Related Registers
<Address: H'0080 0401>
<After reset: H'00>
<Address: H'0080 0409>
<After reset: H'00>
32180 Group User's Manual (Rev.1.0)
DMAC
R W
0 0
R W
R W
0 0
R W