Cs Area Wait Control Registers - Renesas M32R/ECU Series User Manual

16
16.2 Wait Controller Related Registers
Shown below is a Wait Controller related register map.
Wait Controller Related Register Map
Address
b0
H'0080 0180 CS0 Area Wait Control Register
H'0080 0182 CS2 Area Wait Control Register

16.2.1 CS Area Wait Control Registers

CS0 Area Wait Control Register (CS0WTCR)
b0 1 2
WTCSEL
0 1 1
b Bit Name
0 No function assigned. Fix to "0".
1–3 WTCSEL
CSn block wait states select bit
4 When using external bus, set this bit to "0". (Note 3)
5 SWAIT
Strobe signal wait bit
6 RECOV
Recovery cycle addition bit
7 IDLE
Post-read idle cycle addition bit
Note 1: When zero wait state is selected, wait states inserted by external WAIT input are not accepted. For zero wait state also,
make sure the SWAIT, RECOV and IDLE bits all are set to "0". Otherwise, device operation cannot be guaranteed.
Note 2: When one wait state is selected, do not set SWAIT bit = 1. Otherwise, device operation cannot be guaranteed.
Note 3: When using an external bus, set this bit to "0".
If a read cycle is followed immediately by a write cycle, one idle cycle is inserted unless RECOV bit = 1 and IDLE
bit = 0. Table 16.2.1 shows the relationship between RECOV bit and IDLE bit settings and the number of idle
cycles inserted after the bus cycle.
+0 address
(CS0WTCR)
(CS2WTCR)
3 4 5 6
(Note 3) SWAIT RECOV
1 1 1 1
16.2 Wait Controller Related Registers
b7 b8
CS1 Area Wait Control Register
CS3 Area Wait Control Register
b7
IDLE
1
Function
000: 0 wait state (Note 1)
001: 1 wait state (Note 2)
010: 2 wait state
011: 3 wait state
100: 4 wait state
101: 5 wait state
110: 6 wait state
111: 7 wait state
0: No strobe wait
1: Strobe wait added
0: No recovery cycle
1: Recovery cycle added
0: No post-read idle cycle
1: Post-read idle cycle added
16-4
WAIT CONTROLLER
+1 address
(CS1WTCR)
(CS3WTCR)
<Address: H'0080 0180>
<After reset: H'7F>
32180 Group User's Manual (Rev.1.0)
See
b15 pages
16-4
16-4
R W
0 0
R W
R W
R W
R W
R W