20
20.3 Power-Off Sequence
20.3.1 Power-Off Sequence when Not Using RAM Backup
The diagram below shows a turn-off sequence of the power supply (5.0 V or 3.3 V) when not using RAM backup.
VCCE,
VCC-BUS,
OSC-VCC
AVCC
VREF
RESET#
VDDE
Note 1: Wait until the RESET# pin goes low before turning the power supply off.
Notes: • Power-off limitations
VCCE = OCS-VCC
VDDE ≥ VCCE, OSC-VCC
• However, if the above power-off limitations cannot be met, sufficient evaluation must be made during system design
in order to ensure that no power will be applied to the microcomputer with a potential difference of 1 V or more.
For potential differences 0 V to 0.6 V, there is almost no in-flow current. The amount of in-flow current begins to increase
when the potential difference exceeds 0.6 V.
Figure 20.3.1 Power-Off Sequence when Not Using RAM Backup
(Note 1)
20-5
POWER SUPPLY CIRCUIT
20.3 Power-Off Sequence
0V
0V
0V
0V
0V
32180 Group User's Manual (Rev.1.0)