Renesas M32R/ECU Series User Manual page 482

Mitsubishi 32-bit risc single-chip microcomputers
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11
Table 11.3.1 Conversion Clock Periods in A-D Conversion Mode
Conversion speed
Slow mode
Normal speed
Double speed
Fast mode
Normal speed
Double speed
Note 1: The same applies to both software and hardware triggers.
Note 2: Only during scan operation, execution time per channel is added.
(2) Calculating the conversion time when sample-and-hold is enabled
The following schematically shows the method for calculating the conversion time when the sample-and-hold
function is enabled.
Figure 11.3.4 Conceptual Diagram of A-D Conversion Time when Sample-and-Hold is Enabled
Table 11.3.2 Conversion Clock Periods during Normal Sample-and-Hold Mode
Conversion speed
Slow mode
Normal speed
Double speed
Fast mode
Normal speed
Double speed
Note 1: The same applies to both software and hardware triggers.
Note 2: Only during scan operation, execution time per channel is added.
Table 11.3.3 Conversion Clock Periods during Fast Sample-and-Hold Mode
Conversion speed
Slow mode
Normal speed
Double speed
Fast mode
Normal speed
Double speed
Note 1: The same applies to both software and hardware triggers.
Note 2: Only during scan operation, execution time per channel is added.
Start dummy (Note 1) Execution cycle
4
4
4
4
Convert operation
A-D conversion
starts
start trigger
Sampling
Start dummy
time
Start dummy (Note 1) Execution cycle
4
4
4
4
Start dummy (Note 1) Execution cycle
4
4
4
4
11.3 Functional Description of A-D Converters
End dummy
294
1
168
1
126
1
84
1
Execution cycle
End dummy
End dummy
294
1
168
1
126
1
84
1
End dummy
186
1
96
1
90
1
48
1
11-37
A-D Converters
Unit: BCLK
Scan to scan dummy (Note 2)
4
4
4
4
Completed
Unit: BCLK
Scan to scan dummy (Note 2)
4
4
4
4
Unit: BCLK
Scan to scan dummy (Note 2)
4
4
4
4
32180 Group User's Manual (Rev.1.0)

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