Renesas M32R/ECU Series User Manual page 542

12
Set the SIO Receive Control
Register overrun error bit
and error sum bit to "1"
Figure 12.7.2 Receive Operation during UART Mode (Hardware Processing)
The following processing is automatically performed in hardware.
UART receive
operation starts
Receive conditions
met ?
Start bit detected
normally ?
Set the receive status bit to "1"
Receive data
Y
Overrun error ?
Transfer data from the SIO Receive Shift
Register to the SIO Receive Buffer Register
Parity error
framing error ?
Set the SIO Receive Control Register
reception finished bit to "1"
End of UART reception
12-51
12.7 Receive Operation in UART Mode
N
Y
N
Y
N
Y
or
N
SERIAL I/O
Set the SIO Receive Control
Register'scorresponding error bit
and receive error sum bit to "1"
32180 Group User's Manual (Rev.1.0)