Renesas M32R/ECU Series User Manual page 59

Mitsubishi 32-bit risc single-chip microcomputers
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3
SFR Area Register Map (1/27)
Address
b0
H'0080 0000
H'0080 0002
H'0080 0004
Interrupt Request Mask Register
H'0080 0006
SBI Control Register (SBICR)
|
H'0080 0060
CAN0 Transmit/Receive & Error Interrupt Control Register
H'0080 0062
TID2 Output Interrupt Control Register
H'0080 0064
SIO4, 5 Transmit/Receive Interrupt Control Register
H'0080 0066
TID1 Output Interrupt Control Register
H'0080 0068
SIO2, 3 Transmit/Receive Interrupt Control Register
H'0080 006A
TOU0 Output Interrupt Control Register
H'0080 006C
A-D0 Conversion Interrupt Control Register
H'0080 006E
SIO0 Receive Interrupt Control Register
H'0080 0070
SIO1 Receive Interrupt Control Register
H'0080 0072
TIO0–3 Output Interrupt Control Register
H'0080 0074
TOP0–5 Output Interrupt Control Register
H'0080 0076
TIO4–7 Output Interrupt Control Register
H'0080 0078
TOP8, 9 Output Interrupt Control Register
H'0080 007A
TIN7–11 Input Interrupt Control Register
H'0080 007C
TIN12–19 Input Interrupt Control Register
H'0080 007E
TIN3–6 Input Interrupt Control Register
H'0080 0080
H'0080 0082
H'0080 0084
H'0080 0086
A-D0 Disconnection Detection Assist Function Control Register
H'0080 0088
H'0080 008A
H'0080 008C
H'0080 008E
H'0080 0090
H'0080 0092
H'0080 0094
H'0080 0096
H'0080 0098
H'0080 009A
+0 address
(IMASK)
(SBICR)
(ICAN0CR)
(ITID2CR)
(ISIO45CR)
(ITID1CR)
(ISIO23CR)
(ITOU0CR)
(IAD0CCR)
(ISIO0RXCR)
(ISIO1RXCR)
(ITIO03CR)
(ITOP05CR)
(ITIO47CR)
(ITOP89CR)
(ITIN711CR)
(ITIN1219CR)
(ITIN36CR)
A-D0 Single Mode Register 0
(AD0SIM0)
A-D0 Scan Mode Register 0
(AD0SCM0)
(AD0DDACR)
A-D0 Successive Approximation Register
A-D0 Disconnection Detection Assist Method Select Register
A-D0 Comparate Data Register
10-bit A-D0 Data Register 0
10-bit A-D0 Data Register 1
10-bit A-D0 Data Register 2
10-bit A-D0 Data Register 3
10-bit A-D0 Data Register 4
10-bit A-D0 Data Register 5
3.4 Internal RAM and SFR Areas
b7 b8
Interrupt Vector Register
(IVECT)
(Use inhibited area)
(Use inhibited area)
TIN30–33 Input Interrupt Control Register
A-D1 Conversion Interrupt Control Register
TOU1, 2 Output Interrupt Control Register
RTD Interrupt Control Register
DMA5–9 Interrupt Control Register
TID0 Output Interrupt Control Register
SIO0 Transmit Interrupt Control Register
SIO1 Transmit Interrupt Control Register
DMA0–4 Interrupt Control Register
TOP6, 7 Output Interrupt Control Register
TIO8, 9 Output Interrupt Control Register
TOP10 Output Interrupt Control Register
TMS0, 1 Output Interrupt Control Register
TIN0–2 Input Interrupt Control Register
TIN20–29 Input Interrupt Control Register
CAN1 Transmit/Receive & Error Interrupt Control Register
A-D0 Single Mode Register 1
(Use inhibited area)
A-D0 Scan Mode Register 1
A-D0 Conversion Speed Control Register
(AD0SAR)
(AD0DDASEL)
(AD0CMP)
(Use inhibited area)
(AD0DT0)
(AD0DT1)
(AD0DT2)
(AD0DT3)
(AD0DT4)
(AD0DT5)
3-8
ADDRESS SPACE
+1 address
(Use inhibited area)
(Use inhibited area)
(ITIN3033CR)
(IAD1CCR)
(ITOU12CR)
(IRTDCR)
(IDMA59CR)
(ITID0CR)
(ISIO0TXCR)
(ISIO1TXCR)
(IDMA04CR)
(ITOP67CR)
(ITIO89CR)
(ITOP10CR)
(ITMS01CR)
(ITIN02CR)
(ITIN2029CR)
(ICAN1CR)
(AD0SIM1)
(AD0SCM1)
(AD0CVSCR)
32180 Group User's Manual (Rev.1.0)
See pages
b15
5-5
5-6
5-7
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
5-8
11-16
11-18
11-20
11-22
11-25
11-24
11-29
11-26
11-30
11-31
11-31
11-31
11-31
11-31
11-31

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