Fixed Period Clock Output Function - Renesas M32R/ECU Series User Manual

12

12.8 Fixed Period Clock Output Function

When using SIO0, SIO1, SIO4 or SIO5 in UART mode, the relevant port (P84, P87, P65 or P66) can be switched
for use as an SCLKO0, SCLKO1, SCLKO4 or SCLKO5 pin, respectively. That way, a BRG output clock divided by
2 can be output from the SCLKO pin.
Note: • This clock is output not just during data transfer.
1. Configuration when using BRG/2 clock
TXD
RXD
SCLKO
2. Operation timing
Internal BRG
output
SCLKO output
Figure 12.8.1 Example of Fixed Period Clock Output
UART
transmission/reception
Clock output to
peripheral circuits
BRG period
50% 50%
12-55
12.8 Fixed Period Clock Output Function
ST Data
ST Data
32180 Group User's Manual (Rev.1.0)
Serial I/O
SP
SP