Ir Path Sequence - Renesas M32R/ECU Series User Manual

19

19.4.2 IR Path Sequence

Instruction code is set in the Instruction Register (JTAGIR) to select the data register to be accessed in the
subsequent DR path sequence. The IR path sequence is performed following the procedure described below.
(1) From the Run-Test/Idle state, apply JTMS = high for a period of 2 JTCK cycles to enter the Select-IR-
Scan state.
(2) Apply JTMS = low to enter the Capture-IR state. At this time, b'110001 (fixed value) is set in the Instruc-
tion Register's shift register stage.
(3) Proceed and apply JTMS = low to enter the Shift-IR state. In the Shift-IR state, the value of the shift
register stage is shifted right one bit every cycle, and the data b'110001 (fixed value) that was set in (2) is
serially output from the JTDO pin. At the same time, instruction code is set in the shift register stage bit by bit
as it is serially fed from the JTDI pin. Because the instruction code is set in the Instruction Register that
consists of 6 bits, the Shift-IR state must be continued for a period of 6 JTCK cycles. To stop the shift
operation in the middle, enter the Pause-IR state temporarily via the Exit1-IR state (by setting JTMS input
from high to low). To return from the Pause-IR state, enter the Shift-IR state temporarily via the Exit2-IR state
(by setting JTMS input from high to low).
(4) Apply JTMS = high to move from the Shift-IR state to the Exit1-IR state. This completes the shift operation.
(5) Proceed and apply JTMS = high to enter the Update-IR state. In the Update-IR state, the instruction code
that was set in the Instruction Register's shift register stage is transferred to the Instruction Register's parallel
output stage, and decoding of JTAG instruction is thereby started.
(6) Proceed and apply JTMS = high to enter the Select-DR-Scan state or JTMS = low to enter the Run-Test/
Idle state.
JTCK
JTMS
TAP
states
JTDI
JTDO
Figure 19.4.3 IR Path Sequence
JTDI input is sampled at rise of
JTCK in the Shift-IR state.
Don't Care Instruction code (6 bits)
LSB value
High impedance
1 0
JTDO is output at fall of Shift output from the instruction
JTCK in the Shift-IR state. register is fixed to b'110001.
19-8
19.4 Basic Operation of JTAG
Instruction code is set in the parallel output
stage at fall of JTCK in the Update-IR state.
Don't Care
MSB value
High impedance
0 0 1 1
Finished storing instruction code in the
instruction register's shift register stage.
32180 Group User's Manual (Rev.1.0)
JTAG