Tou Count Enable Registers - Renesas M32R/ECU Series User Manual

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10.8.8 TOU Count Enable Registers

TOU0 Count Enable Register (TOU0CEN)
TOU1 Count Enable Register (TOU1CEN)
TOU2 Count Enable Register (TOU2CEN)
b8 9 10
TOUn TOUn TOUn
0CEN 1CEN 2CEN
0 0 0
b Bit Name
8 TOUn0CEN
TOUn_0 count enable bit
9 TOUn1CEN
TOUn_1 count enable bit
10 TOUn2CEN
TOUn_2 count enable bit
11 TOUn3CEN
TOUn_3 count enable bit
12 TOUn4CEN
TOUn_4 count enable bit
13 TOUn5CEN
TOUn_5 count enable bit
14 TOUn6CEN
TOUn_6 count enable bit
15 TOUn7CEN
TOUn_7 count enable bit
The TOU count enable registers control operation of the TOU counters. To enable any TOU counter in software,
enable its corresponding enable protect bit for rewrite and set the count enable bit by writing "1". To stop any
TOU counter, enable its corresponding enable protect bit for rewrite and reset the count enable bit by writing "0".
In single-shot output, single-shot PWM output or delayed single-shot output mode, when the counter stops due
to occurrence of an underflow, the count enable bit is automatically reset to "0". Therefore, the TOU count
enable register when accessed for read serves as a status register indicating whether the counter is operating or
idle.
11 12 13 14
TOUn TOUn TOUn TOUn
3CEN 4CEN 5CEN 6CEN
0 0 0 0
10.8 TOU (Output-Related 24-Bit Timer)
b15
TOUn
7CEN
0
Function
0: Stop count
1: Enable count
10-169
MULTIJUNCTION TIMERS
<Address: H'0080 07DF>
<Address: H'0080 0BDF>
<Address: H'0080 0CDF>
<After reset: H'00>
32180 Group User's Manual (Rev.1.0)
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