Renesas M32R/ECU Series User Manual page 726

19
The state transition of the TAP Controller and the basic configuration of the JTAG related registers are shown below.
1 Test-Logic-Reset
0 Run-Test/Idle
Figure 19.4.1 TAP Controller State Transition
Input multiplexer
Data input
Shift-DR or Shift-IR
Clock-DR or Clock-IR
Update-DR or Update-IR
Test reset
From the preceding cell
Note: • This diagram only shows the basic configuration; not all DR and IR are configured the same way as shown here.
Figure 19.4.2 Basic Configuration of the JTAG Related Registers
0
1
Select-DR-Scan
1
Capture-DR
Shift-DR
Exit1-DR
Pause-DR
0
Exit2-DR
Update-DR
1
Note: • The values (0 or 1) in this diagram denote the state of JTMS input signal.
0
1
G
19.4 Basic Operation of JTAG
1
0
1
0
0
1
1
0
0
1
0
1
0
Shift register stage
D Q D Q
T T
R
19-7
1
Select-IR-Scan
0
Capture-IR
0
0
Shift-IR
1
1
Exit1-IR
0
0
Pause-IR
1
Exit2-IR
1
Update-IR
1 0
To the next cell
Data output
Parallel output stage
32180 Group User's Manual (Rev.1.0)
JTAG