A-D Scan Mode Registers - Renesas M32R/ECU Series User Manual

11

11.2.4 A-D Scan Mode Registers 1

A-D0 Scan Mode Register 1 (AD0SCM1)
A-D1 Scan Mode Register 1 (AD1SCM1)
b8 9 10
ADCSPD ADCSHSL ADCSHSPD
0 0 0
b Bit Name
8 No function assigned. Fix to "0".
9 ADCSPD (Note 1)
A-D conversion speed select bit
10 ADCSHSL
A-D conversion method select bit
11 ADCSHSPD (Note 2)
A-D sample-and-hold conversion speed select bit
12–15 ADSCAN
A-D scan loop select bit
Note 1: The A-D conversion speed is determined by a combination of ADCSPD, ADCSHSL and ADCSHSPD bits and the A-D
Conversion Speed Control Register ADCVSD bit.
Note 2: Setting of this bit is effective when the sample-and-hold function is enabled by ADCSHSL bit.
A-D Scan Mode Registers 1 are used to select operation mode, conversion speed and scan loop when the A-D
Converter is operating in scan mode. The channels selected with the scan loop select bit are scanned sequen-
tially beginning with channel 0 (n-channel scan).
11 12 13 14
ADSCAN
0 0 0 0
11.2 A-D Converter Related Registers
b15
0
Function
0: Normal speed
1: Double speed
0: Disable sample-and-hold
1: Enable sample-and-hold
0: Normal sample-and-hold
1: Fast sample-and-hold
<For write>
'B0000–1111 (channels 0–15)
<For read during conversion> (i = 0, 1)
0000: Converting ADiIN0
0001: Converting ADiIN1
0010: Converting ADiIN2
0011: Converting ADiIN3
0100: Converting ADiIN4
0101: Converting ADiIN5
0110: Converting ADiIN6
0111: Converting ADiIN7
1000: Converting ADiIN8
1001: Converting ADiIN9
1010: Converting ADiIN10
1011: Converting ADiIN11
1100: Converting ADiIN12
1101: Converting ADiIN13
1110: Converting ADiIN14
1111: Converting ADiIN15
11-22
A-D Converters
<Address: H'0080 0085>
<Address: H'0080 0A85>
<After reset: H'00>
R
0
R
R
R
R
32180 Group User's Manual (Rev.1.0)
W
0
W
W
W
W