Eit Processing Mechanism - Renesas M32R/ECU Series User Manual

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4.4 EIT Processing Mechanism

The EIT processing mechanism consists of the M32R CPU core and the interrupt controller for internal peripheral I/
Os. It also has the backup registers for the PC and PSW (the BPC register and the BPSW field of the PSW
register). The EIT processing mechanism is shown below.
RESET#
SBI#
peripheral
Figure 4.4.1 EIT Processing Mechanism
Interrupt
controller
Internal
(ICU)
I/Os
M32R/ECU
M32R CPU core
RI
AE, RIE, FPE, TRAP
SBI
EI
IE flag
(PSW)
BPSW PSW
PSW register
4-7
4.4 EIT Processing Mechanism
High
RI
Priority
SBI
EI
Low
BPC register
PC register
32180 Group User's Manual (Rev.1.0)
EIT