Table Of Contents - Renesas M32R/ECU Series User Manual

CHAPTER 1 OVERVIEW
1.1 Outline of the 32180 Group --------------------------------------------------------------------------------------------- 1-2
1.1.1 M32R Family CPU Core with Built-in FPU (M32R-FPU) --------------------------------------------- 1-2
1.1.2 1.1.2 Built-in Multiplier/Accumulator ---------------------------------------------------------------------- 1-3
1.1.3 Built-in Single-precision FPU -------------------------------------------------------------------------------- 1-3
1.1.4 Built-in Flash Memory and RAM ---------------------------------------------------------------------------- 1-3
1.1.5 Built-in Clock Frequency Multiplier ------------------------------------------------------------------------- 1-4
1.1.6 Powerful Peripheral Functions Built-in -------------------------------------------------------------------- 1-4
1.2 Block Diagram -------------------------------------------------------------------------------------------------------------- 1-5
1.3 Pin Functions --------------------------------------------------------------------------------------------------------------- 1-8
1.4 Pin Assignments ----------------------------------------------------------------------------------------------------------- 1-14
CHAPTER 2 CPU
2.1 CPU Registers ------------------------------------------------------------------------------------------------------------- 2-2
2.2 General-purpose Registers --------------------------------------------------------------------------------------------- 2-2
2.3 Control Registers ---------------------------------------------------------------------------------------------------------- 2-2
2.3.1 Processor Status Word Register: PSW (CR0) ---------------------------------------------------------- 2-3
2.3.2 Condition Bit Register: CBR (CR1) ------------------------------------------------------------------------ 2-4
2.3.3 Interrupt Stack Pointer: SPI (CR2) and User Stack Pointer: SPU (CR3) ------------------------- 2-4
2.3.4 Backup PC: BPC (CR6) -------------------------------------------------------------------------------------- 2-4
2.3.5 Floating-point Status Register: FPSR (CR7) ------------------------------------------------------------ 2-5
2.4 Accumulator ----------------------------------------------------------------------------------------------------------------- 2-7
2.5 Program Counter ---------------------------------------------------------------------------------------------------------- 2-7
2.6 Data Formats --------------------------------------------------------------------------------------------------------------- 2-8
2.6.1 Data Types ------------------------------------------------------------------------------------------------------- 2-8
2.6.2 Data Formats ---------------------------------------------------------------------------------------------------- 2-9
2.7 Supplementary Explanation for BSET, BCLR, LOCK and UNLOCK Instruction Execution ----------------- 2-14
2.8 Precautions on CPU ----------------------------------------------------------------------------------------------------- 2-14
CHAPTER 3 ADDRESS SPACE
3.1 Outline of the Address Space ------------------------------------------------------------------------------------------ 3-2
3.2 Operation Modes ---------------------------------------------------------------------------------------------------------- 3-4
3.3 Internal ROM and Extended External Areas ------------------------------------------------------------------------ 3-5
3.3.1 Internal ROM Area --------------------------------------------------------------------------------------------- 3-5
3.3.2 Extended External Area -------------------------------------------------------------------------------------- 3-5
3.4 Internal RAM and SFR Areas ------------------------------------------------------------------------------------------ 3-6
3.4.1 Internal RAM Area --------------------------------------------------------------------------------------------- 3-6
3.4.2 SFR (Special Function Register) Area -------------------------------------------------------------------- 3-6
3.5 EIT Vector Entry ----------------------------------------------------------------------------------------------------------- 3-35
3.6 ICU Vector Table ---------------------------------------------------------------------------------------------------------- 3-36
3.7 Notes on Address Space ------------------------------------------------------------------------------------------------ 3-38

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